Z88 Hardware Description
THE Z88 HARDWARE DESCRIPTION
Issue 2 - March 1998.
References :
1 - Z88 Service Manual - Issue 1, January 1985
(Prepared by BRAVEMAY for Cambridge Computer Ltd.)
2 - DMF690N Module Specification - 15/07/98
(Prepared by OPTREX, Approved by Cambridge Computer Ltd.)
Introduction
The Z88 is organized around four integrated circuits: the Z80 microprocessor, a specialized gate-array called 'Blink', the ROM chip and a pseudo-static RAM chip. There are 8 connectors on the motherboard: the expansion connector, the serial port, 2 for keyboard connections, one for the LCD and 3 for the slot connectors. We will describe here the pinout, the usage with modifications if possible.
1 - Integrated circuits
This section will describe the four IC used in the Z88.
IC1 : the Z80 CPU
IC2 : the RAM
IC3 : the ROM
IC4 : the Blink
An additional part is devoted to the Flash EPROM s.
1.1 - The Z80 CPU
1.1.1 - Version
The microprocessor is a standard Z80 running in CMOS version for low working and standby power consumption.
For Z88, 4MHz and 6MHz capable Z80 CMOS were used : Z84C004PSC or Z84C0006PSC.
1.1.2 - Pinout
+--------------+
A11 |1 +--+ 40| A10
A12 |2 39| A9
A13 |3 38| A8
A14 |4 37| A7
A15 |5 36| A6
CLK |6 35| A5
D4 |7 34| A4
D3 |8 33| A3
D5 |9 32| A2
D6 |10 Z84C00 31| A1
VCC |11 CPU 30| A0
D2 |12 29| GND
D7 |13 28| /RFSH
D0 |14 27| /M1
D1 |15 26| /RST
/INT |16 25| /BUSRQ
/NMI |17 24| /WAIT
/HALT |18 23| /BUSAK
/MREQ |19 22| /WR
/IORQ |20 21| /RD
+--------------+
1.1.3 - Clocks
Two clocks are driving the Z80. MCK, the master clock and SCK, the standby clock. The MCK (3.2768 MHz) is generated by a 9.8304 Xtal to the Blink and divided by 3, given to the pin 6. The SCK pulses at 25.6 KHz and is active on COMA state.
It is perhaps possible to overclock the Z80 if the Blink supports it! Actually, we can find up to 20MHz Z80 CMOS CPU. I think that 8MHz would be reasonable. But we must be sure that the LCD and the Blink will support these frequencies. (not until I got the Blink datasheets) There will probably be troubles with the Z88 clock... Interrupts will have to be rewritten...
1.1.4 - Interrupts
There are three pins for dealing with interruptions :
BUSRQ (Bus Request) : used for DMA (not connected on the Z88)
NMI (Non Maskable Interrupt) : Jumps to $0066 (BatLow, RTC...)
INT (Ordinary Interrupt) : used in mode 1 (IM1)
For dealing with the maskable interruptions (INT), the Z80 can be switch in three modes.
The interrupt mode 0 (IM0) : for 8080 compatibility
The interrupt mode 1 (IM1) : for non-zilog environnemt (our case)
The interrupt mode 2 (IM2) : for zilog environnement
On reset, OZ puts the Z80 in IM1.
If interrupts are enabled via an OZ_EI, every INT signal jumps to $0038. This routines deals with the keyboard, the bleep, the alarms...
1.2 - The RAM
1.2.1 - RAM types
The serial chip is a NEC uPD42832C. This is a 32K pseudo-static RAM chip. These chips are like dynamic RAM but have the ability to retain
data under a standby voltage (around 2V) with a self refresh circuitry. Dynamic RAM chip are incompatible. Static RAM chip can be use without any problem. The replacement is recommended because theyre power drain is very lowest (1/10 ratio).
1.2.2 - RAM socket
The motherboard layout has 32 pins. It is tracked for a 128K chip. On issue 4 machine a 32K chip is soldier using the 28 low pins.
+--------------+
POE |1 +--+ 32| VCC
A16 |2 31| A15
A14 |3 30| VCC
A12 |4 29| WE
A7 |5 28| A13
A6 |6 27| A8
A5 |7 Z88 26| A9
A4 |8 RAM 25| A11
A3 |9 PCB 24| POE
A2 |10 23| A10
A1 |11 22| CE
A0 |12 21| D7
D0 |13 20| D6
D1 |14 19| D5
D2 |15 18| D4
VSS |16 17| D3
+--------------+
This table describes the 128K chip pinout and Blink signals.
Pin Chip Blink Pin Chip Blink
1 POE POE 32 - VCC
2 A16 MA16 31 A15 MA15
3 A14 MA14 30 [CS] VCC
4 A12 MA12 29 [WE] WRB
5 A7 MA7 28 A13 MA13
6 A6 MA6 27 A8 MA8
7 A5 MA5 26 A9 MA9
8 A4 MA4 25 A11 MA11
9 A3 MA3 24 [OE] POE
10 A2 MA2 23 A10 MA10
11 A1 MA1 22 [CE] IRCE (internal RAM chip enable)
12 A0 MA0 21 D7 MDH
13 D0 MDA 20 D6 MDG
14 D1 MDB 19 D5 MDF
15 D2 MDC 18 D4 MDE
16 VSS GND 17 D3 MDD
1.2.3 - Internal RAM upgrade
It is easily possible to upgrade the internal RAM to 128K. For a 512K upgrade some hardware modification are needed. The OZ version 4 is the only one able to recognize a 512K internal upgrade. For a 128K upgrade you can put a Toshiba TC551001 static RAM chip. It is very cheap (about £4). First, make a backup of your sensible files. Disassembly the box without batteries. Deconnect the two keyboard
ribbons, the screen ribbon. Put your moterboard on a dry table without metal. Unsoldier the old chip. Soldier a 32 pins flat socket, Insert
the new chip. You will have to cut some plastic structures (like an X) in the keyboard plastic support.
For a 512K upgrade, you will have to wire the A17 and A18 pins with a link directly to address lines on a slot connector soldier. Only the OZ version 4 for UK is able to recognise an internal 512K upgrade. Replacing the old 42832 Rams will spare your battery life time. The slowest rams have less consumation (120 or 150 ns). For example :
Size Chip Type Speed Power (mW) Manufacturer
(K) (ns) Act/Stdby
32K (PS) uPD42832C -15L (150) 220 / 2.75 Nec
128K (S) TC551001BPL -10L (100) 27.5/ 0.02 Toshiba
512K (S) TC554001BPL -70 (70) 50.0/ 0.30 Toshiba
128K (PS) TC518128PL -12 (120) 275 / 0.55 Toshiba
512K (PS) TC518512PL -10 (100) 275 / 1.00 Toshiba
128K (PS) HM658128ALP Hitashi
512K (PS) HM658512LP Hitashi
512K (S) HM628512LP Hitashi
(PS=Pseudo-static RAM chip, S=Static RAM chip)
1.3 - The ROM
1.3.1 - ROM types
The serial ROM chip is an UV EPROM NEC uPD23C1000C for foreign OZ. The UK version may be an EPROM chip for v2.2, the v3.0 supports exactly the same software but have been put in a ROM which have only 28 pins. The last v4.0 is fitted on an EPROM chip. The socket layout isn't standard according to the NEC standard (see below). If you wish to fit a new EPROM , be very careful, pins 2 and 24 must be exchanged according to the JEDEC standard. Particulary if you want to use actual 128K EPROM chip, like 27C1001. In theory, you can fit larger EPROM (like 27C2000 or 27C4000) if you wire the addresses lines.
1.3.2 - ROM socket
The mother has 32 pins tracked to the NEC standard.
+--------------+
VCC |1 +--+ 32| VCC
ROE |2 31| VCC
A15 |3 30| VCC
A12 |4 29| A14
A7 |5 28| A13
A6 |6 27| A8
A5 |7 Z88 26| A9
A4 |8 ROM 25| A11
A3 |9 PCB 24| A16
A2 |10 23| A10
A1 |11 22| CE
A0 |12 21| D7
D0 |13 20| D6
D1 |14 19| D5
D2 |15 18| D4
VSS |16 17| D3
+--------------+
This table describes the 128K chip pinout and Blink signals.
Pin Chip Blink Pin Chip Blink
1 VPP VCC 32 VCC VCC
2 [OE] ROE 31 [PGM] VCC
3 A15 MA15 30 VCC VCC
4 A12 MA12 29 A14 MA14
5 A7 MA7 28 A13 MA13
6 A6 MA6 27 A8 MA8
7 A5 MA5 26 A9 MA9
8 A4 MA4 25 A11 MA11
9 A3 MA3 24 A16 MA16
10 A2 MA2 23 A10 MA10
11 A1 MA1 22 [CE] IPCE (Internal PROM chip enable)
12 A0 MA0 21 D7 MDH
13 D0 MDA 20 D6 MDG
14 D1 MDB 19 D5 MDF
15 D2 MDC 18 D4 MDE
16 VSS GND 17 D3 MDD
1.4 - The BLINK gate array
This private chip is a NEC uPD65031. It is CMS soldiered on the PCB. It manages the memory bank switching, the LCD, the serial port,
the interrupts...It is the heart of the machine. Actually we just know its pinout and the description of some registers. The conceptors have
lost the original notes...
Pin Chip Z80 Pin Chip
1 GND 52 VDD
2 VDD 53 GND
3 IOR [IORQ] 54 MA16
4 CRD [RD] 55 MA15
5 MRQ [MREQ] 56 MA14
6 HLT [HALT] 57 MA12
7 NMIB [NMI] 58 MA7
8 INTB [INT] 59 MA13
9 CDB D1 60 MA6
10 ROUT [RST] 61 MA8
11 CDA D0 62 MA5
12 CMI [MI] 63 WRB
13 CDH D7 64 MA9
14 CDC D2 65 MA4
15 CA0 A0 66 MA11
16 CDG D6 67 MA3
17 CA1 A1 68 IPCE (ROM.0 CE)
18 CDF D5 69 MA2
19 CA2 A2 70 MA10
20 CDD D3 71 MA1
21 CA3 A3 72 MA0
22 CDE D4 73 MDH
23 CA4 A4 74 MDA
24 CA5 A5 75 MDG
25 CA15 A15 76 MDB
26 CA6 A6 77 MDF
27 CA14 A14 78 MDC
28 GND 79 VDD
29 VDD 80 GND
30 CA13 A13 81 MDE
31 CA7 A7 82 MDD
32 CA8 A8 83 MA17
33 CA12 A12 84 MA18
34 CA9 A9 85 MAW(19)
35 CA11 A11 86 SE1 (slot1 CE)
36 CA10 A10 87 POE
37 TxD (serial) 88 ROE
38 RCS (serial) 89 PGMB (PGM low)
39 IRCE (RAM.0 CE) 90 EOE
40 GND 91 SE3 (slot3 CE)
41 RxD (serial) 92 FLP (flap)
42 CTS (serial) 93 SE2 (slot2 CE)
43 DCD (serial) 94 SNS (sens line)
44 PN1 (display) 95 VPON (VPP on)
45 LD (display) 96 BTL (Batt low)
46 FR (display) 97 RIN
47 XSCL (display) 98 MCK
48 LD0 (display) 99 SCK
49 LD1 (display) 100 SPKR (speaker)
50 LD2 (display)
51 LD3 (display)
1.5 - The Flash EPROM s
The new Flash EPROM cards represent a new way for Z88 storage. Its main feature is an integrated electrical erasure. The prototype cards are built with an Intel 28F008SA and the serial cards uses the Intel 28F008S5 (which is fastest). Theyre low relative cost make them the new media for 1 Megabyte application card and file storage. They have 44 pins in a PSOP format (0.5 mm between each pin). They are linked to the slot connector like standard EPROM s.
+--------------+
VPP |1 +--+ 44| VCC
RP# |2 43| -
A11 |3 42| A12
A10 |4 41| A13
A9 |5 40| A14
A8 |6 39| A15
A7 |7 38| A16
A6 |8 37| A17
A5 |9 36| A18
A4 |10 35| A19
- |11 Intel 34| -
- |12 28F008 33| -
A3 |13 SA/S5 32| -
A2 |14 31| -
A1 |15 30| WE#
A0 |16 29| OE#
D0 |17 28| -
D1 |18 27| D7
D2 |19 26| D6
D3 |20 25| D5
GND |21 24| D4
GND |22 23| VCC
+--------------+
The table below describes the links between the edge connector and the chip.
Slot signal Flash Signal
1 MA16 A16 38
2 MA15 A15 39
3 MA12 A12 42
4 MA7 A7 7
5 MA6 A6 8
6 MA5 A5 9
7 MA4 A4 10
8 MA3 A3 13
9 MA2 A2 14
10 MA1 A1 15
11 MA0 A0 16
12 MDA D0 17
13 MDB D1 18
14 MDC D2 19
15 SNS
16 GND GND 21
17 GND GND 22
18 MA14 A14 40
19 VPP VPP 1
20 VCC VCC 44,23
21 VCC -
22 PGM WE# 30
23 MA13 A13 41
24 MA8 A8 6
25 MA9 A9 5
26 MA11 A11 3
27 POE -
28 EOE OE# 29
29 MA10 A10 4
30 SE3 CE# 43
31 MDH D7 27
32 MDG D6 26
33 MDD D3 20
34 MDE D4 24
35 MDF D5 25
36 MA17 A17 37
37 MA18 A18 36
38 MA19 A19 35
Other pins:
Pin 1 : Vpp
Pin 23: Vcc
Pin 44: Vcc
Must be connected to a 100nF ceramic capacitor.
Pin 2 : RP# connected to VCC
NB: all the VCC and GND pins have to be connected.
2 - The Connectors
2.1 - SLOT connectors
It is private format connector wiring 38 pins. They are devoted for memory addressing. Each slot is able to address 1024K. The slot 3 present a Vpp (12V) line, useful for EPROM programming. Pseudo-static RAM, static RAM, EPROM and Flash EPROM can be used.
Slot RAM/ROM RAM/ROM EPROM Pins for Pins for Pins for
pins Slot 1 Slot 2 Slot 3 32K 128K 32K
Signals Signals Signals EPROM EPROM RAM
1 A16 A16 A16 - 24 -
2 A15 A15 A15 - 3 -
3 A12 A12 A12 2 4 2
4 A7 A7 A7 3 5 3
5 A6 A6 A6 4 6 4
6 A5 A5 A5 5 7 5
7 A4 A4 A4 6 8 6
8 A3 A3 A3 7 9 7
9 A2 A2 A2 8 10 8
10 A1 A1 A1 9 11 9
11 A0 A0 A0 10 12 10
12 D0 D0 D0 11 13 11
13 D1 D1 D1 12 14 12
14 D2 D2 D2 13 15 13
15 SNSL SNSL SNSL - - -
16 GND GND GND 14 16 14
17 GND GND GND 14 16 14
18 A14 A14 A14 27 29 1
19 VCC VCC VPP 1 1 -
20 VCC VCC VCC 28 32 -
21 VCC VCC VCC - - 28
22 WEL WEL PGML - 31 -
23 A13 A13 A13 26 28 26
24 A8 A8 A8 25 27 25
25 A9 A9 A9 24 26 24
26 A11 A11 A11 23 25 23
27 POE POE POE - - 22
28 ROE ROE EOE 22 2 -
29 A10 A10 A10 21 23 21
30 SE1 SE2 SE3 20 22 20
31 D7 D7 D7 19 21 19
32 D6 D6 D6 18 20 18
33 D3 D3 D3 15 17 15
34 D4 D4 D4 16 18 16
35 D5 D5 D5 17 19 17
36 A17 A17 A17 - - -
37 A18 A18 A18 - - -
38 A19 A19 A19 - - -
2.2 - The expansion port connector
It is a standard 2.54mm double sided 48 pins male connector for expansion. It presents all the Z80 bus signals. On the issue 4 version, the flap has been sealed because expansion insertion may result in a crash due to static electricity.
Component P C B
Side A Edge Side B
GND 1 SNSL see below
A11 2 +12v
A12 3 A10
A13 4 A9
A14 5 A8
A15 6 A7
clock 7 A6
D4 8 A5
D3 9 A4
D5 10 A3
D6 11 A2
VCC 12 A1
D2 13 A0
GND 14 GND
D0 15 D7
D1 16 M1L
INTL 17 FLP (flap switch)
slot 18 slot
HALTL 19 NMIL
MREQL 20 WRL
IORQL 21 RDL
MAWL 22 RESETL Resets Z88 (2 pulses required)
-BT 23 SVCC 5.4v while the machine is 'on.'
GND 24 SNSL
SNSL allows the machine to be automaticly placed into comotose state
buy causing a 'power fail interupt' when an edge connector is plugged
into to the expansion slot of the Z88.
2.3 - The Serial Port Connector
This is a DB9 male connector with a private pinout describe below.
Pin Signal Sens
1 - unswitched +5v at 10 uA output
2 TxD transmit data output
3 RxD receive data input
4 RTS ready to send output
5 CTS clear to send input
6 - reserved for future use
7 GND
8 DCD data carrier detect input
9 DTR switched +5v at 1mA output
Note : DTR is high when the machine is awake. The machine is always
awake when the screen is active, but even if asleep the machine will
wake every minute or so to carry out various housekeeping tasks, such
as checking for alarms, and at these time DTR will go high. Pin 1 will
show a signal if there is power available to the machine.
The PC DB9 female connector
1 DCD
2 RxD
3 TxD
4 DTR
5 GND
6 DSR
7 RTS
8 CTS
9 -
The PC link cable
Z88 PC Z88 (front view) PC (front view)
1 - 4
2 --------- 2 1 2 3 4 5 5 4 3 2 1
3 --------- 3 6 7 8 9 9 8 7 6
4 --------- 8
5 --------- 7
7 --------- 5
8 - 9
2.4 - The keyboard connectors
The keyboard is just 8 * 8 matrix between the Z80 address and data buses. It is connected on SK6 and SK7. In theory it is possible to replace the membrane by a PCB with mechanical keys (and resistors in serial). The rubber keyboard technology seems to consume a lot of power.
SK6 signals SK7 signals
1 A14 1 D5
2 A15 2 D4
3 A13 3 D3
4 A12 4 D1
5 A11 5 D7
6 A10 6 D0
7 A9 7 D6
8 A8 8 D2
Keyboard matrix (for the QWERTY UK)
A15 A14 A13 A12 A11 A10 A09 A08
2 1 3 4 5 6 7 8
RSH HLP [ ] - = \ DEL 5 D7
SQR LSH SPC LFT RGT DWN UP ENT 7 D6
ESC TAB 1 2 3 4 5 6 1 D5
INX DIA Q W E R T Y 2 D4
CAP MEN A S D F G H 3 D3
. , Z X C V B N 8 D2
/ ; L M K J U 7 4 D1
£ " 0 P 9 O I 8 6 D0
There are two issues for the keyboard membrane : a red one, the first, and the green one which is the last and the most common. The first issue (red) seems to be often unreliable with a lot of short circuits which sends a lot of unexpected characters... It is impossible to repair them. The green issues are very good. I have got mine since ten years and I am actually typing on it...
The keyboard is probably the only part with which you encountered troubles. You can keep the same for all your life if you think to clean the contacts sometimes. After a long time, some carbon particle agglomerate on the membrane and generate short-circuits. The only thing to do is to clean the contact surfaces with some alcohol. Unscrew the case, deconnect the keyboard ribbons. Pull out the rubber and be very careful of the three slot. Clean all the keys surfaces on the rubber and the membrane with a tissue with a few standard alcohol (90°). Dry it before reassembling. Do it carefully especially on the cursor, tab, diamond, square, enter and shift keys.
2.5 - The LCD connector
The most common LCD module is the DMF690N produced by OPTREX. Some previous versions exist, with more failure and less contrast. This unit has its own PCB. The LCD panel is a dot matrix of 640*64 pixels, the NRD7482. It is driven by nine CMS chips.One SED1610 : a 86 lines driver and eight SED1600 : 80 rows dirvers.
Another IC is devoted to voltage generation.
The module is connected by a special ribbon with 14 links on SK5.
Ribbon signals:
14 is the left one, 1 is on the right in top view.
Pin Symbol Level Function
1 VDD - Base supply (0V)
2 VSS - Power supply for Logic
3 VLCD - Power supply for LCD driving
4 LP H>L Date Latch signal
5 FR H/L Alternate signal for LCD driving
6 YDIS L Display off signal
7 NC - No connection
8 DIN H Frame signal
9 XSCL H>L Clock signal for shifting serial data
10 NC - No connection
11 D0 H/L Display data
12 D1 H/L Display data
13 D2 H/L Display data
14 D3 H/L Display data
All of these signals are directly managed by the blink. It builts the screen by reading directly in the memory the different character set and screen base. The cursor is hardware managed too.
Conclusion
There is still a lot of things to do to improve the Z88 hardware:
- IR serial interface
- mechanical keyboard
- overclocked Z80 CPU
- small integrated supply with NiMH battery charger
- video interface
- A/D and D/A converter interface
- ...
I'll translate the Z88 service manual from paper to a file as soon as possible.
Thanks to Chris Morris for the LCD datasheets.
I'm still searching the BLINK datasheets.
For anything about Z88 don't hesitate to contact me at :
tpeycru@club-internet.fr
Thierry Peycru (Zlab), March 1998.